Ohai, yeah, what did I miss? I like your avatar
Yeah, we can resurrect this. You might want to look at this thread:
danballforum.proboards.com/index.cgi?board=pgtech&action=display&thread=44Here's the plan:
Make a computer.
Specifically, it could be a stack based approach:
The computer's code will be in ROM (read only memory). This ROM can be changed by the user, but during operation it will remain static. For dynamic memory, there will be a stack and probably some registers. The stack is a FILO (first in, last out) data structure. "Pushing" a value to the stack will move all of the data in the stack down one position and the new value will be at the top of the stack. "Popping" from the stack involves retrieving the value at the top of the stack and then moving all of the values below up one position. The computer will likely be 1 bit, meaning that all dynamic memory, bus lines, and registers will only handle one bit. As such, the computer will perform operations on single, boolean values. The ROM will be capable of storing several instructions which can do things like the following:
Push values from registers to the stack
Pop values from the stack to registers
Jump to another point in the program
Jump conditionally to another point in the program depending on the value in a register
Command the logic unit to perform an operation on one or more registers and store the result to a register
The details are fuzzy, but here are some specifics that I've come up with on the spot.
There should probably be seven registers, O1, O2, R, G, IN, OUT, FLAG
Each register will have a special function and may be read from (r), written to (w), or both (r/w) by the computer.
O1 (w) Operand 1
O2 (w) Operand 2
R (r) Result (when a boolean operation is executed, this register will hold the result of the operation between O1 and O2. For example O1 AND O2 or O1 OR O2)
G (r/w) General purpose register, can be used freely by the computer
IN (r) Input by user
OUT (w) Output to user (when this register is written to, it will probably activate some extra circuitry to run a display which shows past values as well).
FLAG (r) True if user has input a value since the last time this register was read (register is cleared on read).
Since there are four registers that can be read from in this scheme, and four register which can be written to, any register can be described by two bits and the context in which it is being used.
For example, they could be mapped as such:
For reading:
00 G
01 R
10 IN
11 FLAG
For writing:
00 G
01 OUT
10 O1
11 O2
The instruction set could include:
PUSH [read context] pushes register to stack
POP [write context] pops from stack to register
HIGH [write context] writes 1 to register
LOW [write context] writes 0 to register
JMP [absolute address] jumps unconditionally to address
COND [read context] [absolute address] jumps to address if register is True
NOR performs boolean NOR operation across O1 and O2, stores the result in R
NAND performs boolean NAND operation across O1 and O2, stores the result in R
This instruction set has 8 instructions, so three bits are required to describe any instruction.
Some instructions require the address of a register, which requires an extra two bits.
Jump instructions require an absolute address to a ROM instruction, which may require several bits. My suggestion would be to then use a three bit ROM, where each word is three bits. Instructions would occupy one word. Registers would occupy one word with a bit of wasted space. Addresses could occupy two words (they will be rare in any case, so the relatively huge memory requirements aren't too disappointing).
Alternately, words could all be six bits. The two instructions without any parameters (NOR and NAND) could be replaced by a single instruction (BOOL) described by two bits, not three. The third bit would be combined with the last three bits in the word to form a four bit truth table for the operation. ANY boolean operation with two operands and one result bit could be executed in a single instruction. This would save space on the stack considerably and make programming easier. With schema, the absolute addresses could be replaced with three bit addresses of entries in a second ROM which would hold the full addresses. The COND instruction would have to be compromised. Perhaps it would always use the R register for determining the condition. Or perhaps G. Kinda confusing I know, but this may be a far better option. All instructions would fit fully into 6 bits.
So if this were the case, let's map out the instructions.
000 0RR PUSH
001 0XX POP
010 0XX LOW
011 0XX HIGH
100 XXX JMP
101 XXX COND
11X XXX BOOL
But that's just one alternative. It might be better to completely forget the stack, add in some instructions for moving values between registers, and then add in four more general purpose registers. The more I think about it, the more that solution sounds workable and appealing. Look, I spent forever writing about a stack and ended up deciding it wasn't such a great idea! There's so much to consider here. Overall design strategy, however, should focus on:
Reduced instruction set, probably 8 instructions
Simplicity
Compactness
Functionality
Boolean operations
There must be some sort of conditional, some way to loop, methods of input and output, and memory in one form or another.
[img src="http://i.imgur.com/BKhxo.png[/img
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